is far more than Verilog with a ++ operator. A hands-on knowledge of this rich language is critical for chip design and verification engineers. This thorough course starts from the synthesis-friendly RTL (register transfer level) parts of the language. You'll learn new syntax for describing digital logic and busing: structures; enumeration; interfaces. The course then introduces OOP (object-oriented program) syntax, including classes, methods, and constrained random data—laying a solid foundation for UVM verification. As a final project, you can choose between: a factorial-generator datapath design (RTL code); or a testbench to generate randomized Ethernet frames (OOP code).
Course Learning Outcomes:
- Write SystemVerilog code to describe practical digital logic functions, intuitively and concisely
- Rapidly debug your code, identifying and fixing syntax issues—whether common or obscure
- Confidently employ SystemVerilog code enhancements and conveniences such as: ticked literals ('1) packed/unpacked arrays, imported packages, and user-defined type definitions (typedef)
- Utilize new syntax like typedef, struct, and enum to customize your code to application-specific
chip architectures or data-packet formats. Add assert statements to check key design properties
- Develop reusable testbench code for simulating logic functions or bus operations, including defining a class of objects, calling its methods, constraining random stimuli, and using interface connections
- Explain the key pillars of OOP. Identify the SystemVerilog keywords or constructs that support object encapsulation, inheritance, and polymorphism. State how they enable UVM verification methodology
Course Typically Offered: Online in summer quarter.
Prerequisite: Familiarity with digital logic and a working knowledge of any programming language.
Next Step: After completeting this course consider taking other courses in our Digital Signal Processing or Wireless Engineering certificate programs.
Contact: For more information about this course, please email firstname.lastname@example.org.
Course Number: ECE-40301
Credit: 3.00 unit(s)
+ Expand All
1/12/2021 - 3/13/2021